Remember when yields for TSMC's initial N3B chips were very low, around 55%? This is because Apple has high standards for efficiency or performance per watt.
Unfortunately, TSMC was unable to improve so Apple had to LOWER the efficiency standards across the board in order..
2/13
Unfortunately, TSMC was unable to improve so Apple had to LOWER the efficiency standards across the board in order..
2/13
..to improve yields by accepting 3nm dies that they would have normally tossed due to having worse efficiency, in order to improve yields. See screenshots from @Tech_Reve
Apple lowered performance and efficiency goals to improve chip yields.
x.com
3/13
Apple lowered performance and efficiency goals to improve chip yields.
x.com
3/13
..would ultimately allow Apple to raise their efficiency standards not just back to where they were supposed to be, but even further due to TSMC's experience and optimization of the new 3nm process.
This weak efficiency gain is just a blip in the Apple Silicon roadmap.
13/13
This weak efficiency gain is just a blip in the Apple Silicon roadmap.
13/13
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